A lot of you might be aware of Moore’s Law, which states that the number of transistors on a chipset increases every two years while the footprint of the chipset reduces. And as per the current trend in the industry, the law seems to be true everywhere, with manufacturers striving continuously to fit in more computing power on a smaller chipset. The statement holds true for both, the mobile and computer industry, and we are seeing manufacturers like Apple and Huwaei pushing limits to shrink down the size of the chipset. And now, Intel hops on the bandwagon to shrink the size of its chipsets with its new architecture, Foveros 3D.

how intel plans to revolutionize cpus with foveros 3d - intel

At the Architectural Day event yesterday, Intel unveiled a new strategy to develop its upcoming processors, using which it will be able to break down different components of a CPU into individual elements, called ‘chiplets’. The process, as Intel calls – Foveros 3D, essentially stacks-up various components on a chipset. By doing so, the chipset can take advantage of extra processing power, memory, graphics, AI computing, etc by stacking individual elements on top of each other vertically, while shrinking down the size and still retaining the same or more computing power.

Chiplets are small silicon components that can be stacked up on top of one another: similar to the Lego blocks. By using chiplets, manufacturers would no longer require the need to carve a chipset out of silicon in a single piece. Instead, they can take advantage of the chiplets available for different modules and stack them on top of other chiplets. The benefits are obvious, by using chiplets manufacturers would not have to undergo the tedious process of grafting all the modules onto a single piece of silicon.

how intel plans to revolutionize cpus with foveros 3d - intel foveros

In addition to 3D stacking, another stacking process, called 2D stacking, comes with its own set of pros and cons and manages to serve the purpose to a certain extent. The process involves separating various components into smaller chiplets, each of which can be manufactured separately using different production nodes. However, unlike 3D stacking, chipsets based on 2D stacking draw more power and do not provide an adequate level of performance. Lately, Intel has been a lot in the news for its 10nm chipset, and some even speculated that it has stopped the project altogether after facing a lot of hurdles in the manufacturing process. On the other hand, Intel came out denying the speculation and said it is making progress on 10nm by taking advantage of 2D stacking.

In addition to chiplets and stacking, Intel had some other advancements to share as well, which include Gen11 integrated graphics and Sunny Cove CPU architecture. The Sunny Cove architecture is expected to be at the core of Intel’s next-generation Xeon and Core processors and is expected to improve parallel execution speeds while reducing latency. Intel is promising to deliver Sunny Cove based Core series CPUs in the latter half of the year 2019. And the Xeon series CPUs somewhere around the first half of the next year.

As for using Foveros based processors in different smartphones and tablets, Intel has said that it is likely to see their processors getting used in various upcoming smartphones and tablets starting in the second half of the year 2019. But with smartphone manufacturers starting to use foldable displays on their smartphones and tablets, it would not be an easy job for Intel with the stacking architecture.

Was this article helpful?